(a) Field of the Invention
The present invention relates generally to digital communications and, more particularly, to a method and apparatus for rapidly synchronizing a digital receiver to a digital transmitter in both time and frequency.
(b) Description of Related Art
The reception of a digitally modulated signal requires that a receiver be synchronized with a transmitter. Two common modes of synchronization are by frequency and time. When a receiver attempts to obtain information sent by a transmitter, the receiver must be tuned to the frequency being transmitted. That is, the transmitter and the receiver must be synchronized in frequency. For a digital receiver to accurately demodulate the received signal, the receiver must know the starting time of the individual symbols that are received. This is referred to as time (or symbol) synchronization. Digitally transmitted information can only be interpreted when a transmitter and a receiver are synchronized in both time and frequency.
The importance of time and frequency synchronization in a digital transmission system can be readily appreciated. Although most academic discussion regarding the interaction of digital transmitters and receivers assume synchronization, actual implementation of a digital system requires the consideration of various methods of time and frequency synchronization. Many known synchronization methods employ the transmission of a known bit pattern or reference sequence from the transmitter to the receiver. In many cases a receiver also locally generates the same reference sequence that is transmitted by the transmitter. The comparison of the received reference sequence and the locally generated reference sequence provides the information necessary to synchronize the receiver to the transmitter in time. Synchronization may be done at the beginning of a transmission, or may be used periodically to ensure or re-establish synchronization.
A technique which is generally used for time synchronization is that of signal delay and correlation processing. A received signal, which contains a reference sequence, is fed to a tapped delay line, which is then correlated with a locally generated reference sequence via a summing bus. The received reference sequence is shifted relative to the locally generated bit sequence until, by way of correlation measurements, it is determined that the transmitted and locally generated sequences are time synchronized. This method is acceptable in applications where the frequency offset between the transmitter and the receiver is relatively small. However, in situations where frequency offsets between the transmitter and the receiver are large, the correlation of long sequences is subject to significant loss.
In situations where there exists a significant frequency offset between the transmitter and the receiver, another known synchronizing approach is to scan the receiver frequency in small steps through a frequency range suspected to contain a signal that is to be received. At each step in 25 frequency a correlation operation is repeated. The process of changing receiver frequency and executing the correlation procedure is repeated until the transmitted signal is found. When the proper correlation is found both time and frequency are synchronized. This synchronization method is computationally inefficient and may be very time consuming if the frequency range to be stepped through is large. However, this method may be implemented in a hardware device such as an application specific integrated circuit (ASIC) dedicated to the function of synchronizing the receiver to the transmitter. Although the ASIC approach provides rapid synchronization, due to the fact that software calculations are avoided, it is not generally a cost effective solution.
Therefore, there exists a need for a rapid, scalable and computationally efficient method for synchronizing a digital receiver to a digital transmitter.